A 40k S/s 6‐Bit Flash ADC Circuit Design With Dual Positive‐Feedback Comparator Using InGaZnO Thin‐Film Transistors
Abstract
ABSTRACT This work presents a 6‐bit flash analog‐to‐digital converter (ADC) based on indium gallium zinc oxide (InGaZnO) thin‐film transistors (TFTs) featuring a high‐speed comparator with dual positive‐feedback loop. The proposed comparator thus achieves a DC gain of 47 dB, enabling a transient response below 3 and a minimum detectable voltage difference of 1 . In comparison, conventional InGaZnO TFT comparators typically exhibit response times exceeding 30 and minimum detectable voltages above 10 mV. Leveraging this high‐performance comparator, the full flash ADC integrates an InGaZnO TFT‐based encoder and resistor‐string digital‐to‐analog converter (R‐DAC). The designed ADC circuit obtains a sampling rate of 40k S/s with a maximum differential nonlinearity (DNL) of 0.44 least‐significant bit (LSB), a maximum integral nonlinearity (INL) of 0.76 LSB, and an active area of 25 mm 2 . The proposed ADC is promising for high‐end flexible electronics applications.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Thin-Film Transistor Technologies
Radio Frequency Integrated Circuit Design
Publication details
- Journal / source
- International Journal of Circuit Theory and Applications
- Publication date
- 12 March 2026
- Language
- EN