Reservoir Computing With Pulse‐Type Hardware Chaotic Neuron Model

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Authors: Takeru Yonekawa, Takuto Yamaguchi, Katsutoshi Saeki
Cited by: 0
References: 11

Abstract

ABSTRACT Reservoir computing (RC) has attracted much attention in recent years as a model suitable for machine learning of time series information and requiring low computational resources. Among these, physical reservoir computing (PRC), in which RC is implemented in hardware devices, has been actively studied using various devices as it is applicable to edge computing. In this article, we construct a RC system using Pulse‐type Hardware Chaotic Neuron Model (P‐HCNM), which can be implemented in integrated circuits, and perform a benchmark task. A second order Nonlinear Auto Regressive Moving Average (NARMA) task, which is widely used as a benchmark task for RC, is evaluated using Normalized‐Mean‐Square‐Error (NMSE), and the result is 0.0456. The score is comparable to other PRCs in previous studies. In the Delay task that evaluates short‐term memory, the recall results of the RC showed a forgetting curve. The result indicates that RCs have short‐term memory, which is a necessary component for RCs. Using these benchmark tasks, we suggest that a P‐HCNM‐implemented neural network can be the hardware basis for a neuromorphic reservoir computing system.

Fields of Study & Subjects

Neural Networks and Reservoir Computing Advanced Memory and Neural Computing Neural Networks and Applications

Publication details

Journal / source
Electronics and Communications in Japan
Volume
109
Issue
1
Pages
116–123
Publication date
4 February 2026
Language
EN