Efficient FPGA Accelerator for ECG Signal Classification Using dCViTrN and Optimized Booth Multiplier

View at publisher
Authors: L. Malathi
Cited by: 1
References: 33

Abstract

ABSTRACT ECG signal classification is important for the early detection of cardiovascular disorders (CVDs). The current methods have been struggling with the nonlinear complexity of ECG signals, making them inefficient for real‐time diagnostic analysis. Thus, this paper proposes a new FPGA‐based deep convolutional vision transformer network (dCViTrN) (FPGA‐dCViTrN) accelerator to detect different types of arrhythmias. While performing the ECG signal classification process, an unsigned divide, and conquer‐based look‐up‐table (LUT) oriented booth multiplier (UDC‐LUT‐BM) is used to perform complex mathematical operations of dCViTrN, like multiplication, for minimizing the complexity. Two publicly available datasets, specifically the PTB‐XL and MIT‐BIH arrhythmia, are used for experimentation. Furthermore, a variety of performance indicators, including accuracy, recall, precision, and F1‐score, are utilized to evaluate the deep learning accelerator. In addition, delay, resource utilization, and power consumption are used to assess the hardware complexity. The findings show that the FPGA‐dCViTrN design delivers 99.25% and 99.7% classification accuracy on the MIT‐BIH and PTB‐XL datasets. Overall, this research provides a robust, high‐accuracy deep‐learning model strengthened by an optimized FPGA architecture, allowing for enhanced, real time ECG classification and assessment in medical diagnostics.

Fields of Study & Subjects

ECG Monitoring and Analysis Cardiac electrophysiology and arrhythmias Physical Unclonable Functions (PUFs) and Hardware Security

Publication details

Journal / source
Transactions on Emerging Telecommunications Technologies
Publisher
Wiley
Volume
37
Issue
4
Publication date
1 April 2026
Language
EN