Thermal Management and Hot Carrier Multiplication in Few Layered PtSe 2 Devices

ABSTRACT Engineering of two‐dimensional (2D) material‐based devices for optimize thermal transport and high current carrying capacity has become a prominent research area toward the development of high‐performance next‐generation 2D heterogeneous electronics. In this context, transition metal dichalcogenides (TMDs) have gained significant attention due to their tunable physical properties, particularly in relation to electron–phonon interactions and thermal transport mechanisms. Among these, PtSe 2 exhibits a tunable electronic structure from semimetal in bulk to semiconductor at the monolayer limit. This study investigates few layered PtSe 2 ‐based devices to understand their high electric field breakdown behavior and underlying heat dissipation mechanisms at low and room temperatures. The heat dissipation is quantitatively analyzed through the interfacial thermal conductivity measurements of PtSe 2 /SiO 2 and PtSe 2 /h‐BN interfaces with corresponding values as 14.2 MW.m −2 .K −1 and 30.5 MW.m −2 .K −1 , respectively, using Raman thermometry. Electrical breakdown of the devices at room‐temperature is primarily driven by self‐heating effects. A detailed magneto‐transport of PtSe 2 Hall bar devices at low temperatures reveals the carrier multiplication in PtSe 2 under high electric fields as the key contributor causing the superlinear current response and the eventual electrical breakdown of the devices.