Design and Verification of a Modified Numerically Controlled Oscillator for Clock Recovery in a Digital SerDes Receiver on an FPGA

Communications in computer and information science 2026

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Authors: Harsh Shah, Pallavi G. Darji, Purvang D. Dalal, Arpita Patel

DOI: 10.1007/978-3-032-16038-6_16

Cited by: 0

References: 4

Fields of Study & Subjects

Advancements in PLL and VCO Technologies Embedded Systems and FPGA Applications Embedded Systems and FPGA Design

References 4