Testing External Interrupts in the NEORV32 RISC-V Processor: Adapting ModelSim for Modern RISC-V Architecture

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Authors: Arunima Saxena, Arindam Bhattacharyya, Lilian Molina, Savita Patil, Hussain Al-Asaad
Cited by: 0
References: 4

Fields of Study & Subjects

Real-Time Systems Scheduling Security and Verification in Computing Radiation Effects in Electronics

Publication details

Journal / source
Smart innovation, systems and technologies
Pages
555–566
Publication date
1 January 2026
Language
EN