FPGA-Based Implementation of a Five-Stage Pipelined RISC-V Processor Using Xilinx Zynq-7000

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Authors: M. R. Maheshwar, E. Chitra, A. N. V. V. D. Manikanta Pavan, M. Reddy Balaji
Cited by: 0
References: 4

Fields of Study & Subjects

Embedded Systems Design Techniques Parallel Computing and Optimization Techniques VLSI and FPGA Design Techniques

Publication details

Journal / source
Lecture notes in networks and systems
Pages
511–521
Publication date
1 January 2026
Language
EN