High-Performance Arithmetic Logic Unit (ALU) Based on Vedic Multiplier

Lecture notes in networks and systems 2026

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Authors: Lalit Kumar Dabi, Kamlesh Kumar, Manoj Kumar, Priyanshu Lakra, Mansi Jhamb
DOI: 10.1007/978-981-96-9932-2_3
Cited by: 0
References: 14

Fields of Study & Subjects

Low-power high-performance VLSI design Quantum-Dot Cellular Automata Parallel Computing and Optimization Techniques

Publication details

Journal / source
Lecture notes in networks and systems
Pages
31–55
Publication date
1 January 2026
Language
EN