Gate, Switch, and Structural Modeling

Maker Innovations Series 2026 Book chapter

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Authors: Majid Pakdel
DOI: 10.1007/979-8-8688-2311-4_5
Cited by: 0

Abstract

In Chapter 4 , we explored memory implementations, focusing on storage elements like RAM and ROM, which form the backbone of data retention in digital systems. Now, in this chapter, we shift our focus to low-level hardware modeling in Verilog, examining how digital circuits can be described at different abstraction levels—gate, switch, and structural—for finer control over design implementation.

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Advanced Data Storage Technologies Embedded Systems Design Techniques

Publication details

Journal / source
Maker Innovations Series
Pages
133–166
Publication date
1 January 2026
Language
EN
Document type
Book chapter