Performance-Driven Area Efficient Ternary Adder Architecture Using Memristor and 14 nm FinFET Technology

Circuits Systems and Signal Processing 2026

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Authors: Madhu Verma, Preeti Verma, Jyoteesh Malhotra

DOI: 10.1007/s00034-026-03500-x

Cited by: 0

References: 20

Fields of Study & Subjects

Low-power high-performance VLSI design Advanced Memory and Neural Computing VLSI and FPGA Design Techniques

References 20