Design and Fault Detection of Charge Pump PLLs with NAND Gate based PFD Using BPNN and PNN

Circuits Systems and Signal Processing 2026

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Authors: J Ramesh, V. Govindaraj, C. Ezhilazhagan, S Nithya Devi

DOI: 10.1007/s00034-026-03692-2

Cited by: 1

References: 37

Fields of Study & Subjects

Advancements in PLL and VCO Technologies Low-power high-performance VLSI design VLSI and Analog Circuit Testing

References 37