Equivalent circuit modeling and relaxation dynamics of Au/Ti/AlN/n-Si MOS structures

Abstract This study presents a comprehensive impedance spectroscopy (IS) analysis of Au/Ti/AlN/n-Si metal–oxide semiconductor (MOS) structures, with the aim of elucidating their dielectric and interfacial properties under different bias and frequency conditions. The real ( $${Z}{\prime}$$ Z ′ ) and imaginary ( $${Z}^{{\prime}{\prime}}$$ Z ′ ′ ) components of impedance were measured across 100 Hz–1 MHz and DC biases between 1 and 4 V, and the data were modeled using an equivalent circuit composed of a series resistance ( $${R}_{s}$$ R s ), a parallel resistance ( $${R}_{p}$$ R p ), and a parallel capacitance ( $${C}_{p}$$ C p ). The impedance spectra revealed a clear capacitive-to-resistive transition, while Cole–Cole plots consistently exhibited a single semicircle, confirming the presence of a unique relaxation mechanism. Relaxation times ( τ ), extracted both from $${Z}^{{\prime}{\prime}}$$ Z ′ ′ –f peaks and $${R}_{p}\bullet {C}_{p}$$ R p ∙ C p fitting, showed excellent agreement and demonstrated bias-dependent evolution, with accelerated relaxation at moderate bias and slower dynamics at higher bias due to trap saturation. Notably, $${C}_{p}$$ C p remained nearly constant across all biases, while $${R}_{p}$$ R p varied systematically, reflecting the influence of interfacial states. The analysis of normalized interface trap density further indicated progressive trap passivation with increasing bias, underscoring the stability of the AlN/Si interface. These findings validate the equivalent circuit model and highlight AlN as a promising dielectric material for high-frequency, low-leakage MOS applications, offering predictable relaxation behavior and reduced trap activity compared to conventional high-k dielectrics.