Co-design of traffic-aware dynamic VC partitioning and congestion-aware routing in CPU–GPU heterogeneous NoCs

Abstract With the growing demand for heterogeneous computing in high-performance applications, there is intense competition between CPU-GPU heterogeneous processors based on on-chip network communication. However, existing communication resources are insufficient to meet the increasing bandwidth demands, which can lead to traffic congestion and ultimately degrade system performance. To address the traffic congestion problem in data transmission, we first analyze traffic characteristics and reveal the load imbalance between request traffic and reply traffic. Based on this observation, we propose a Traffic-Type-aware Virtual Channel Partitioning (T-VCP) strategy. In addition, we introduce a Port Congestion-Aware Routing (PCAR) algorithm, which alleviates local hotspots by dynamically selecting paths according to real-time congestion monitoring. Furthermore , to adapt to runtime traffic fluctuations, we present a Dynamic Virtual Channel Partitioning (DT-VCP) strategy. Experimental results show that, in a 4×4 CPU-GPU heterogeneous NoC, the T-VCP+PCAR strategy reduces network latency by 18.3% and improves IPC by 3.4% compared to traditional XY routing without VC partitioning. The DT-VCP+PCAR strategy further reduces latency by 22.8% and improves IPC by 9.4%. Additional experiments on a larger 8×8 architecture demonstrate a 26.5% latency reduction, confirming the good scalability of the proposed method.