A low-cost hardware-algorithm co-optimized architecture for sparse CNN acceleration on edge devices
Fields of Study & Subjects
Advanced Neural Network Applications
Embedded Systems Design Techniques
VLSI and FPGA Design Techniques
Publication details
- Journal / source
- Microelectronics Journal
- Volume
- 170
- Pages
- 107065–107065
- Publication date
- 16 January 2026
- Language
- EN