A 125- μ W 14-bit 5-MS/s pipelined-SAR ADC with linearity-enhanced bootstrapped switch and kT/C noise cancellation

Microelectronics Journal 2026

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Authors: Chenglong Zhu, Haochuan Wang, Chenkai Peng, Hengzhi Hong, Yu Xia, Yuhua Cheng, Mang I. Vai, Sio Hang Pun, Guodong Su, Hui Hong

DOI: 10.1016/j.mejo.2026.107147

Cited by: 0

References: 33

Fields of Study & Subjects

Analog and Mixed-Signal Circuit Design Radio Frequency Integrated Circuit Design Low-power high-performance VLSI design

References 33