A synthesizable bandwidth monitoring module for DDR4 memory controllers: RTL design and post-implementation analysis

Microelectronics Journal 2026

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Authors: Zhiyuan Xing

DOI: 10.1016/j.mejo.2026.107410

Cited by: 1

References: 24

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Embedded Systems Design Techniques Real-Time Systems Scheduling

References 24