Design, optimization and linearity analysis of pocket engineered core-insulator embedded nanosheet FET (C-NSFET)

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Authors: Shilpa Sonali, Ashish Raman, Abhishek Singh Chauhan, Prabhat Singh
Cited by: 1
References: 10

Fields of Study & Subjects

Advancements in Semiconductor Devices and Circuit Design Ferroelectric and Negative Capacitance Devices Low-power high-performance VLSI design

Publication details

Journal / source
Micro and Nanostructures
Publisher
Elsevier BV
Volume
212
Pages
208560–208560
Publication date
7 January 2026
Language
EN