Design and modeling of gate–drain overlapped vertical TFET for enhanced ambipolar current suppression

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Authors: Siddharth Jain, Ram Awadh Mishra
Cited by: 0
References: 31

Fields of Study & Subjects

Advancements in Semiconductor Devices and Circuit Design 2D Materials and Applications Semiconductor materials and devices

Publication details

Journal / source
Micro and Nanostructures
Volume
213
Pages
208608–208608
Publication date
12 February 2026
Language
EN