Trap charges reliability in a heterojunction double gate ferroelectric p-n-i-n tunnel FET (HJ-DG-Fe p-n-i-n TFET): A simulation study
Fields of Study & Subjects
Ferroelectric and Negative Capacitance Devices
Advancements in Semiconductor Devices and Circuit Design
Nanowire Synthesis and Applications
Publication details
- Journal / source
- Microelectronics Reliability
- Publisher
- Elsevier BV
- Volume
- 177
- Pages
- 115987–115987
- Publication date
- 7 January 2026
- Language
- EN