Neural network approach to NBTI/HCD coupled failure analysis of MOS ICs
Abstract
In this paper, a coupled negative bias temperature instability (NBTI)/hot carrier degradation (HCD) failure model is proposed on the 2-D {V G , V D } voltage plane with neural network. The voltage explicit models of NBTI and HCD are revised by reaction-diffusion (R-D) and energy-driven models, respectively. NBTI/HCD coupling model describing threshold voltage shift (ΔV th ) is constructed based on the physics-informed neural network (PINN)-long short-term memory (LSTM) neural network model in the form of a voltage weight factor on the 2-D voltage plane, which is used to predict the degradation of the performance of ring oscillator (RO) and low-noise amplifier (LNA). In comparison to experimental data throughout the bias space, the predicted ΔV th has an average relative error of 11.92% under various stress conditions. The circuit simulation shows that the average frequency degradation error of RO is 8.6%. When predicting the noise figure (NF) and S-parameters of LNA, it is consistent with the experimental degradation trend. This work provides a lesson in combining the reliability of neural networks with integrated circuits.
Fields of Study & Subjects
Semiconductor materials and devices
Integrated Circuits and Semiconductor Failure Analysis
Reliability and Maintenance Optimization
Publication details
- Journal / source
- Microelectronics Reliability
- Volume
- 177
- Pages
- 115996–115996
- Publication date
- 13 January 2026
- Language
- EN