Research on single event micro latch-up mechanism in 28 nm SRAM-based FPGA using pulsed laser

In this work, the phenomenon of Micro Single Event Latch-up (mSEL) in Xilinx 28 nm Static Random Access Memory (SRAM) based Field-Programmable Gate Arrays (FPGAs) is systematically investigated through pulsed laser experiments, complemented by circuit-level simulations and theoretical analysis. The study covers the localization of susceptible resources and analysis of layout structures, elucidates the physical mechanisms underlying the multi-step micro-current increase behavior, and reports, for the first time, the discovery and causal analysis of the mSEL current saturation phenomenon. Furthermore, the impact of mSEL on chip functionality is experimentally verified, and potential application-level mitigation strategies are discussed. The results provide valuable references for the application evaluation and radiation-hardened design of commercial FPGAs in aerospace and other high-reliability environments.