SPEED: Structured kernel block pruning with filter groups for efficient and elastic SW-HW co-design in FPGA-based CNN accelerators
Fields of Study & Subjects
Advanced Neural Network Applications
Embedded Systems Design Techniques
VLSI and FPGA Design Techniques
Publication details
- Journal / source
- Neurocomputing
- Volume
- 675
- Pages
- 132958–132958
- Publication date
- 7 February 2026
- Language
- EN