CREATOR-Sail: A RISC-V web simulator based on Sail ISA specification

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Authors: Juan Carlos Cano-Resa, Félix Garcı́a-Carballeira, Diego Camarmas-Alonso, Alejandro Calderón
Cited by: 1
References: 1

Abstract

This article introduces CREATOR-Sail, a RISC-V web simulator that uses Sail as the instruction specification language. This enables binaries written in assembly language to be compiled, executed and debugged while simulating the complete RISC-V architecture and instruction set. The simulator can now simulate both 32-bit and 64-bit RISC-V variants and supports the simulation of the complete instruction set specified in the official standard, including vector and privileged instructions. Both variants include a cache memory module to increase the capacity for architecture simulation, mimicking a real processor. The aim of this work is to provide an industrial-level solution for companies and research groups, offering them a tool with which to customize the environment for their own purposes. The simulator includes an assembly compiler and a debugging module, making it more user-friendly and intuitive than other simulators. All simulator components have been integrated into the web environment using WebAssembly, which enables the execution of native code in a web environment and provides an execution performance similar to that of native applications compared to applications implemented only in JavaScript. The source code of web simulator is available at https://github.com/creatorsim/creator . The web simulator is available at https://creatorsim.github.io/creator/ .

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Real-Time Systems Scheduling Software Engineering and Design Patterns

Publication details

Journal / source
Journal of Systems Architecture
Publisher
Elsevier BV
Volume
176
Pages
103809–103809
Publication date
19 April 2026
Language
EN