A heuristic approach for near Pareto-optimal design space exploration in Approximate High-Level Synthesis

Integration 2026

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Authors: Tiago Almeida, Isaías Felzmann, Lucas Wanner

DOI: 10.1016/j.vlsi.2025.102638

Cited by: 0

References: 24

Fields of Study & Subjects

Embedded Systems Design Techniques Low-power high-performance VLSI design VLSI and FPGA Design Techniques

References 24