High-performance FIR filter designs using Brent Kung Adder and pipelined Vedic multiplier

Integration 2026

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Authors: J. Banumathi, G. Karthy

DOI: 10.1016/j.vlsi.2025.102645

Cited by: 0

References: 52

Fields of Study & Subjects

Low-power high-performance VLSI design Digital Filter Design and Implementation Numerical Methods and Algorithms

References 52