Cost-aware test pattern ordering for VLSI using an enhanced LSTNet architecture
Fields of Study & Subjects
VLSI and Analog Circuit Testing
Engineering and Test Systems
Embedded Systems Design Techniques
Publication details
- Journal / source
- Integration
- Publisher
- Elsevier BV
- Volume
- 109
- Pages
- 102741–102741
- Publication date
- 10 April 2026
- Language
- EN