Large-Scale Dual-Channel WSe 2 Reconfigurable Field-Effect Transistors with Charge-Trapping Layer for 2T TCAM and Reconfigurable Logic

Reconfigurable field-effect transistors (RFETs), which allow postfabrication switching of device polarity, are promising candidates for compact and functionally flexible circuit design. Here, we demonstrate large-scale dual n-/p-channel RFETs based on homogeneous monolayer WSe 2, integrated with a charge-trapping layer. Ambipolar transport is achieved by forming parallel n- and p-type conduction paths through selective doping. In addition, a multilayer gate dielectric stack (hBN/HfO 2 /Al 2 O 3 ) enables complete nonvolatile switching between n- and p-type modes via charge-trapping. Exploiting this reconfigurability, we realize ternary content-addressable memory using only two RFETs (2T) per cell, where polarity combinations encode the three logic states (‘0’, ‘1’, and ‘X’). Furthermore, a full set of Boolean logic gates─including AND, OR, NAND, and NOR, is demonstrated using series and parallel 2T configurations. These results establish dual n-/p-channel WSe 2 RFETs as scalable and functionally versatile building blocks for programmable logic and memory in future computing architectures.