High-Density Sub-10 nm Silicon Nanowires Fabricated via Directed Self-Assembly and Sequential Infiltration Synthesis Synergistic Patterning for Multiple Applications

This study presents a synergistic patterning technique integrating directed self-assembly lithography (DSA) and sequential infiltration synthesis (SIS) to fabricate silicon nanowires with small critical dimension, high aspect ratios, and high density on silicon-on-insulator (SOI) substrates. Through optimization of polystyrene- block -poly(methyl methacrylate) (PS- b -PMMA) guiding templates and SIS cycles, polymer templates were in situ converted into aluminum oxide (Al 2 O 3 ) hard masks with high etching selectivity. Coupled with a single-layer silicon dioxide (SiO 2 ) intermediate mask strategy, this approach significantly simplifies the device fabrication workflow while leveraging the flexibility of SiO 2 etching to achieve progressive scaling of silicon nanowires. Focused ion beam-transmission electron microscopy (FIB-TEM) characterization confirmed nanowire profiles with a top width of ∼6.6 nm, bottom width of ∼14.9 nm, pitch of 28 nm, and height of ∼53.5 nm, which are further used in multiple applications. The exposed sub-10 nm silicon nanowire channels exhibited ultrasensitive gas-sensing capabilities, demonstrating a 49.8% response to 2.5 ppm ammonia (NH 3 ), significantly outperforming conventional NH 3 sensors. The silicon nanowire was further combined with a high- k /metal gate process to demonstrate its application in fin field-effect transistors (FinFETs). The device shows a switching ratio exceeding 10 7 and a subthreshold swing as low as 69.59 mV/dec, demonstrating exceptional electrostatic control of the Fin channel fabricated by the DSA-SIS process. This work not only provides a cost-effective manufacturing solution of high-density silicon nanowires but also demonstrates the application potential of DSA-SIS technology in semiconductor devices with a nanostructure for both sensing and integrated circuit operations.