Atomic layer etching-enabled interface engineering for reduced subthreshold swing and improved uniformity in p-channel GaN MOSFETs

In this work, enhancement-mode p-MOSFETs on p-GaN/AlGaN/GaN-on-Si substrates were fabricated using a gate recess process that combines reactive ion etching (RIE) with atomic layer etching (ALE), where ALE is employed as an interface engineering approach following conventional plasma etching to mitigate recess-induced interface damage. Compared with RIE-only devices, the RIE + ALE devices yield smoother surfaces and significantly suppress interface trap density. These interface improvements lead to enhanced subthreshold characteristics and markedly tighter device-to-device uniformity. In particular, the subthreshold swing decreased from 365 ± 179 to 149 ± 17 mV/dec, while the off-state leakage current was suppressed from 1.9 ± 3.6 × 10−7 to 8.5 ± 5.5 × 10−9 mA/mm. These results demonstrate that ALE provides an effective interface engineering approach for suppressing interface damage and enabling uniform enhancement-mode p-MOSFETs, highlighting its potential for reliable GaN complementary metal–oxide–semiconductor logic and power integrated circuits.