Wafer-scale dry transfer of graphene via thermally removable Sb2O3 sacrificial layer
Abstract
Wafer-scale integration of graphene onto technologically relevant substrates demands transfer methodologies that preserve intrinsic electronic properties while maintaining manufacturing scalability. We present a residue-minimized dry transfer strategy employing Sb2O3 as a thermally removable sacrificial layer for 4-in. graphene wafer integration. Sb2O3 deposited on single-crystal graphene/Ge(110) enables mechanical exfoliation and deterministic placement onto SiO2/Si substrates without polymer–graphene contact. Raman spectroscopy confirms elimination of Sb2O3 phonon modes while preserving graphene crystallinity, with wafer-scale mapping demonstrating I2D/IG = 2.8 and minimal charge doping. Non-contact terahertz time-domain spectroscopy validates carrier mobility μ = 3205 cm2/(V s) and carrier density Ns = 1.69 × 1013 cm−2. Critically, wafer-scale terahertz mapping with high-density spatial sampling (2681 points, 2 mm spacing) reveals uniformity of carrier concentration (CV:34%) and mobility (CV:39%), providing statistical insight into spatial correlations and defect distributions inaccessible through conventional device-based characterization. This approach circumvents polymer contamination and aqueous processing inherent to wet transfer methods, offering a scalable pathway for two-dimensional material integration.
Fields of Study & Subjects
Graphene research and applications
Silicon and Solar Cell Technologies
Silicon Nanostructures and Photoluminescence
Publication details
- Journal / source
- Applied Physics Letters
- Publisher
- AIP Publishing
- Volume
- 128
- Issue
- 13
- Publication date
- 30 March 2026
- Language
- EN