Performance improvement of junctionless gate all around (JL-GAA) MOSFETs with recessed drain/source (Re-D/S)

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Authors: Alok Kumar, Tarun Kumar Gupta, Bhawna P. Shrivastava, Abhinav Gupta, Amit Kumar Pandey
Cited by: 3
References: 25

Abstract

This study provides a systematic investigation of Re-D/S-JL-GAA, Re-D/S-JL-CM-GAA, and Re-D/S-N-JL-DGAA MOSFETs with 20 nm channel length. The device’s attributes were compared using ATLAS 3D device simulator to determine its use in analog, digital, and communication systems. As shown in the study, the Re-D/S-N-JL-DGAA MOSFET has good electrostatic performance and is immune to short channel effects (SCEs). The proposed device, Re-D/S-N-JL-DGAA, outperforms the JL-GAA MOSFET in terms of ION/IOFF ratio (98%), DIBL (55%), and subthreshold swing (9%). As a result, the Re-D/S-N-JL-DGAA MOSFET exhibits exceptional short-channel behaviour with increased power delay performance. Furthermore, the analog and linearity performances of all device designs were studied and compared. The Re-D/S-JL-CM-GAA-D/S-JL-CM-GAA had the highest early voltage and intrinsic gain among the devices tested. Consequently, this device is best suited for analog applications. Furthermore, the simulation results show that the Re-D/S-JL-CM-GAA MOSFET outperforms other devices in terms of linearity performance, making it suitable for use in communication applications.

Fields of Study & Subjects

Advancements in Semiconductor Devices and Circuit Design Semiconductor materials and devices Ferroelectric and Negative Capacitance Devices

Publication details

Journal / source
International Journal of Electronics
Publisher
Informa UK Limited
Volume
113
Issue
7
Pages
1280–1295
Publication date
7 January 2026
Language
EN