A reduction of input/output logics to SAT

Journal of Applied Non-Classical Logics 2026 Open access

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Authors: Alexander Steen
DOI: 10.1080/11663081.2026.2658659
Cited by: 1
References: 39

Fields of Study & Subjects

Formal Methods in Verification Embedded Systems Design Techniques Low-power high-performance VLSI design

Publication details

Journal / source
Journal of Applied Non-Classical Logics
Publisher
Informa UK Limited
Pages
1–34
Publication date
27 April 2026
Language
EN