High-frequency semantic hierarchical dynamic feature fusion network for chip surface defect detection

Abstract The chip defect detection faces numerous challenges, such as small defects with fuzzy edges, significant defect scale variations, and low background contrast. To address these issues, we propose a high-frequency semantic hierarchical dynamic feature fusion network (HDF-Net) for accurate and efficient chip surface defect detection. Built on an encoder-decoder framework, HDF-Net integrates four dedicated attention modules including of dynamic multi-perspective attention (DMPA), hierarchical scale fusion attention (HSFA), fusion feature integrator (F-integrator), and edge-directed attention module (EDAM). DMPA enhances multi-scale defect representation via multi-receptive field semantic weighting, while HSFA combines region and pixel attention to refine defect localization. F-integrator captures global dependencies and local context through the fusion of attention mechanisms and dynamic convolution, and EDAM leverages Local-Gaussian–Laplacian edge features to retain high-frequency semantic information and suppress the double-edge effect, improving weak-boundary defect detection. Experimental results on a self-built chip defect dataset demonstrate that HDF-Net achieves an AUC of 97.49% and a FPS of 88.4, significantly outperforming state-of-the-art methods, and accurately detects large defects in bright backgrounds and small defects as small as 8.3 μm in dark backgrounds. Additionally, HDF-Net achieves an AUC of 92.98% on the public NUST-SIRST dataset, verifying its strong generalization ability. The proposed model balances high accuracy and efficiency, making it suitable for industrial real-time detection scenarios.