Low-voltage-triggered SCR with resistor-capacitance detection circuit for ESD protection of SPAD readout circuits

Abstract In single-photon avalanche diode (SPAD) image sensor applications, high-performance electrostatic discharge (ESD) protection is crucial for ensuring the reliability of the core chip. Traditional ESD structures often struggle to simultaneously meet key parameters such as low trigger voltage, high holding voltage, and low leakage current. To address this challenge, this paper proposes a low-voltage ESD protection structure based on an RC-triggered silicon-controlled rectifier (RCTSCR). By integrating an RC detection circuit at the gate, the RCTSCR effectively reduces the trigger voltage. Additionally, the RC circuit enhances the clamping speed and minimizes voltage overshoot through a synergistic interaction with the device structure. The working mechanism of the RCTSCR, compared to traditional low-voltage-triggered silicon-controlled rectifier (LVTSCR), was analyzed using computer-aided design tools, and fabricated using a 0.18 μ m complementary metal oxide semiconductor process. Transmission-line pulse test results show that, compared to the LVTSCR, the RCTSCR reduces the trigger voltage ( V t1 ) by 25%, increases the holding voltage by 14.7%, and achieves a human-body model protection level exceeding 15 kV. This RCTSCR is particularly suitable for SPAD image sensor readout circuits operating at a voltage of 1.8 V.