Design, simulation and characterization of the ALICE ITS3 MOSS analog front-end

Abstract The upgrade of the ALICE vertex detector (ITS3) with wafer-scale stitched MAPS targets an orthogonal MIP detection efficiency > 99 %, with a fake-hit rate < 0.1 pixel -1 s -1 and a power budget of 40 mW/cm 2 . The MOSS wafer-scale monolithic sensor analog front-end, featuring ∼ 0.55mV/e - gain and < 15 e - rms noise and threshold dispersion each, was designed, prototyped and measured, confirming these performance targets. Measurement results suggest that the on-chip digital readout signal (strobe) injects noise into the pixel matrix. This effect can be suppressed in future prototypes to further improve the signal-to-noise ratio. In this work, front-end design, simulation and measurement results will be presented together with a discussion on the observed strobe-related effect.