Low power on-chip data transmission for wafer-scale monolithic active pixel sensors
Abstract
Abstract This paper details the implementation of the digital pulse shaping subsystem within the Backbone Transmission Line Encoding (BTLE) driver, a low-power, long-distance on-chip data transmission solution designed in a 65 nm CMOS process. Digital pulse shaping is critical for minimizing inter-symbol interference (ISI) caused by bandwidth limitations of on-chip interconnects, especially in wafer-scale monolithic active pixel sensors (MAPS). A duobinary encoder coupled with a parallelized polyphase finite impulse response (FIR) filter is used for efficient shaping of the transmitted signal spectrum. This reconfigurable architecture achieves reliable 160 Mb/s data transfer over a 10 cm on-chip link, as validated by simulations demonstrating low power consumption (FoM 37.3 fJ/bit/mm of transmission line length) and effective ISI mitigation.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Low-power high-performance VLSI design
Advancements in PLL and VCO Technologies
Publication details
- Journal / source
- Journal of Instrumentation
- Volume
- 21
- Issue
- 02
- Pages
- C02002–C02002
- Publication date
- 1 February 2026