A 25 GBd co-integration demonstration of wafer-scale graphene modulator and BiCMOS driver

Abstract We demonstrate the first co-integration of a wafer-scale single-layer graphene electro-absorption modulator (EAM) with a high-speed SiGe bipolar CMOS (BiCMOS) electronic integrated circuit (EIC), achieving robust operation up to 25 GBd. The scalable graphene EAM, fabricated in a 300 mm CMOS pilot line, exhibits an intrinsic electro-optic (EO) bandwidth of 11.2 GHz. To overcome the RC-limitation and simultaneously enable low-voltage operation, the EIC was co-designed with a 30 Ω internal termination impedance and amplifies the voltage swing by a factor of 3. This optimization increased the effective EO bandwidth and allowed the co-integrated system to produce open eye diagrams at 25 GBd from a low 500 mV p p input drive voltage. We report measured Q -factors and an estimated bit error rate of 1.37 × 10 − 7 at 25 GBd using a 5-tap feed-forward equalizer. This work demonstrates the first functional EO link co-integrating a graphene modulator with a BiCMOS electronic driver. By validating this wire-bonded interface, we establish a feasible and practical route towards energy-efficient, scalable photonic interconnects.