An energy efficient QCA-based multilayer reversible ALU using Peres Gate

Abstract Quantum dot Cellular Automata (QCA) is a transistor-less technology that has attracted more attention than traditional CMOS technology due to its improved circuit design and reversible nature. The QCA offers better performance in terms of area, speed, and power dissipation in electronic circuits. The arithmetic and logic unit (ALU) is the fundamental block of every computation device. This paper proposes a modular reversible ALU constructed using QCA technologies that use the reversible Peres and Double Peres gates. It performs 20 operations, including addition, subtraction, increment, and logic operations, and is implemented as a multilayer framework with seven layers. This ALU has 108 cells with a latency of 1.25 clocks. The suggested multilayer ALU architecture improves the number of cells, delay, and area over the recent literature by 45.45%, 16.67%, and 66.67%, respectively. Furthermore, this ALU can execute logic and arithmetic operations in a modular fashion, enabling the simultaneous execution of both. The proposed design dissipates 6.02e–002 eV of energy, with an average of 5.48e–003 eV per cycle. The proposed ALU architecture is simulated using QCA Designer 2.0.3 and QCA Designer-E. Ensuring error-free communication between layers through proper cell placement, minimizing design complexity, adopting reversible logic gates with lower quantum cost to perform more logic and arithmetic operations, and achieving minimal energy dissipation are the significant challenges of multilayer QCA design.