Spacer engineering approach for performance enhancement of tree-based nanosheet FETs - a numerical simulation-based study

Abstract This work investigates the electrical performance of a stacked Tree-based Nanosheet field-effect transistor (FET) structure comprising three vertically arranged channels with different underlap lengths and spacer materials. The analysis focuses on evaluating the influence of these structural variations on key DC, analog, and radio-frequency (RF) performance parameters. To suppress leakage current and improve device reliability, high- κ Hafnium Oxide ( HfO 2 ) and low- κ Silicon Nitride ( Si 3 N 4 ) are employed in the gate stack configuration. The results demonstrate that appropriate optimization of channel underlap and dielectric material selection significantly improves the trade-off between drive current, transconductance, and leakage suppression. These findings provide a promising pathway for designing high-performance, low-leakage Tree-based NSFETs suitable for advanced analog and RF applications.