A 50-Gb/s 0.76 pJ/b NRZ Transmitter With MUX-FFE Combination and Linear Driver in 28-Nm CMOS

Energy- and area-efficient wireline transceivers are in high demand to reduce power consumption and increase shoreline density for extra-short-range die-to-die interfaces. This brief presents a 50-Gb/s 0.76 pJ/b non-return-to-zero (NRZ) transmitter occupying only 0.03 mm2. Low power consumption and small area are achieved by a new system structure with combined multiplexer (MUX) and feedforward equalizer (FFE) followed by a source-follower linear driver to preserve equalization amplitude. Furthermore, a combined MUX-FFE circuit employing modified charge-steering logic is proposed, enabling simultaneous multiplexing and equalization with reduced power consumption and inter-symbol interference (ISI).