A Register-Minimal ECC Accelerator Based on Hamburg’s Montgomery Ladder

Point multiplication (PntMlt) is a fundamental operation in elliptic curve cryptography (ECC), and uniform PntMlt algorithms such as the Montgomery ladder (ML) are widely adopted to resist side-channel leakage. In particular, for short Weierstrass curves, Hamburg’s improved ML reduces the number of modular multiplications, and this efficiency has made it an attractive option. However, since it also employs projective coordinates, the formulae become more complicated, and the hardware implementation still suffers from increased register usage and substantial storage overhead. To address these issues, we propose a register-minimal accelerator architecture that achieves efficient realization of Hamburg’s ML through coordinate compression and reuse of submodule registers with operation rescheduling. The proposed architecture is applicable to any short Weierstrass curve, as only the operand width of the modular arithmetic units needs to be adjusted for different field sizes. In this work, we demonstrate the approach using the widely deployed NIST P-256 curve. Through FPGA and ASIC implementations, we show that Hamburg’s ML can be realized as an efficient hardware accelerator. The proposed design requires only about 90–100 kGEs of hardware resources and completes PntMlt in 0.05 ms and 0.12 ms at 45 nm and 180 nm process technologies, respectively, demonstrating its practicality for secure and resource-constrained ECC systems.