A Survey and Review on the BFV Homomorphic Encryption Hardware Architecture Implementations

Homomorphic encryption (HE) enables secure computation on encrypted data, preserving privacy in applications such as cloud computing, healthcare, and privacy-preserving AI. Among various HE schemes, the BFV scheme stands out for supporting exact arithmetic on encrypted integers, but its classical version suffers from high computational overhead, particularly during polynomial multiplication. Hardware acceleration using FPGA, ASIC, and GPU offers a promising solution to these bottlenecks. This paper provides a comprehensive survey of hardware implementations of the BFV scheme, focusing on both the classical and Residue Number System (RNS) variants.We detail the limitations of the classical BFV scheme and discuss how RNS-based improvements or variants address these issues. Notably, this paper fills a gap in the literature by comparing BFV hardware implementations across different platforms and providing insights into performance trade-offs. Our work aims to guide future research in optimizing homomorphic encryption through hardware acceleration.