Vertically Stacked Doping-Less Dual-Metal Gate Nanosheet FET With TiO2 Dielectric for High Sensitivity Autoimmune Disease Biosensing

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Authors: Srinivasa Rao Karumuri, Peravali Rahul, Vakkalakula Bharath Sreenivasulu, Girija Sravani Kondavitee
Cited by: 1
References: 40

Abstract

In this paper, we have presented and simulated a Vertically Stacked Doping-less Nanosheet FET biosensor for autoimmune disease detection with improved sensitivity and performance. The proposed device has a dual-metal gate configuration with different work functions for the source, drain, and gate. TiO₂ is used as the high-K gate dielectric to achieve improved electrostatic control and reduced leakage currents. The vertically stacked nanosheet structure improves channel controllability while reducing short channel effects resulting in improved subthreshold swing (SS) and ON current. The proposed device performance has been evaluated in Silvaco ATLAS TCAD in terms of performance parameters Ion, Ioff, Ion/Ioffratio and sensitivity. The device achieved a better Ion(1.92 x 10-4), Ioff(8.07 x 10-13) and Ion/Ioff(2.38 x 108) conforming its suitability for biosensing applications. The device effectively detects neutral biomolecules with dielectric constants ranging from K = 1 to 12 as well as charged biomolecules introduced into the sensing cavity. The device has good sensing ability varied for different cavity filling levels (25%,50%,75%,100%) shows the better detection at 100% filling level. The effect of temperature is explored and demonstrates that a rise in temperature leads to lower drain current while slightly lowering sensitivity due to increased thermal carrier activity. This confirms reliable sensor performance under different conditions. The proposed design therefore provides a potential path to next generation high sensitivity biosensor systems for early identification of illnesses and biomedical diagnostics.

Fields of Study & Subjects

Advancements in Semiconductor Devices and Circuit Design Nanowire Synthesis and Applications Ferroelectric and Negative Capacitance Devices

Publication details

Journal / source
IEEE Access
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
14
Pages
20681–20693
Publication date
1 January 2026