Energy-Efficient Izhikevich Neuron Design Using Approximate CORDIC-Based Multipliers for Low-Power Neuromorphic Hardware
Abstract
The Izhikevich neuron model is a widely used spiking neuron model that combines biologically plausible behavior with computational efficiency. As hardware implementations often suffer from high power and area usage due to multiplication operations, CORDIC-based multipliers have been a promising solution. However, as the energy efficiency of CORDIC-based multipliers is still limited, further improvement is needed. This paper proposes an approximate-adder-based CORDIC approach for implementing the Izhikevich neuron, replacing multipliers with shift-add operations and exact adders with approximate ones to reduce resource usage. Simulation and ASIC implementation results demonstrate significant improvements in energy efficiency with 14.56% increase in throughput and 10.23% area reduction, while compromising the neuron dynamics by only 0.07% in Mean Relative Error (MRE). In simulation, the membrane potential traces of the proposed model closely match those of the standard HOMIN model across all neuron behaviors, and the optimal configuration of 9 CORDIC iterations achieves the best trade-off between accuracy and efficiency.
Fields of Study & Subjects
Low-power high-performance VLSI design
Advanced Memory and Neural Computing
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEEE Access
- Volume
- 14
- Pages
- 22146–22161
- Publication date
- 1 January 2026
- Language
- EN