Hierarchical Optimization Framework for Robust PCB Defect Detection via Adaptive YOLOv12 Architecture

The requirement of trustable and precise defect detection in Printed Circuit Boards (PCBs) remains a challenge in the industrial setting. Often certain microscopic anomalies that are overlapped or hidden by high-frequency substrates go unnoticed. This work presents a detailed optimization pipeline customized specifically to integrate data-driven optimization and architectural refinement to attain better detection rates and accuracy. The uniqueness of this work is in the integrated pipeline that combines a multi-stage adaptive optimization process with an FGA-integrated YOLOv12 training script. So as to enhance representational focus and suppress background noise in complex PCB imagery. The framework begins with an adaptive hyperparameter optimization loop, where, 50 mini-training trials were conducted to empirically identify an optimal parameter set, specific to PCBs. This is followed by a model training phase, where the optimized configuration is utilized to train a high-capacity YOLOv12-Large model using 5-fold cross-validation, for up to 200 epochs. Further, aggressive data augmentation and early stopping mechanisms were implemented to ensure generalization of the model. The strong quantitative performance (mAP@.50=0.811) obtained using the paper’s customized dataset and the increase in accuracy relative to other available model substantiates the claim that, the proposed framework feature discrimination thereby, reducing noise in cluttered circuit layouts.