Dual-Mode CMOS LIF Neuron With Subthreshold Efficiency and Saturation-Driven Robustness

We present a compact CMOS leaky integrate-and-fire neuron that operates natively in two regimes: subthreshold for ultra-low power and saturation for robust interfacing. This dual-mode functionality bridges the energy efficiency of the subthreshold operation with the connectivity advantage of saturation within a single circuit. The design leverages device-level parasitics and subthreshold conduction to minimize the energy consumption per spike and reduce silicon area. It also maintains sufficient headroom in the saturation region to drive or directly interface with non-subthreshold components and resistive memories. In addition to outlining the design methodology and sizing strategy that enable dual-mode operation without needing additional amplification stages, we introduce a mathematical model that captures the circuit dynamics. Under specified operating assumptions, this model allows us to predict the spiking frequency for various application targets. SPICE simulations validate the expected spiking dynamics and trade-offs between energy consumption and latency. We also compare our proposed neuron with recent CMOS implementations reported in the literature. While some earlier designs achieve lower absolute energy consumption, our approach features a significantly reduced transistor count and the ability to interface with other cells without dedicated amplification, offering a practical and integration-friendly solution. By converting unavoidable capacitive parasitics into advantages, thiswork presents a silicon-efficient method for low-power neuromorphic hardware, making both subthreshold efficiency and saturation-range connectivity key design objectives