Computational Bayesian Experimental Design and Inference for Assisted Linear Circuit Prototype Debug

Circuit prototype debug can be challenging for students and novice engineers for which emerging intelligent Bayesian statistical methods have potential application. We introduce an automated assisted debug methodology using advancements in computational Bayesian experimental design and inference to automate all cognitive sub-problems of the debug process. A broad probabilistic defect model is injected into a target circuit topology, enabling design of maximally-informative tests and assessment of defect probabilities following test observations. The topology-agnostic approach and efficient implementation enables real-time assisted debug for laboratory contexts without prior analysis of target circuits. Case studies demonstrate effectiveness in tackling linear circuit debug with improved capabilities over literature on integrated analog circuit debug.