Lattice-Matched InAlN/GaN D-Mode MIS-HEMT on SiC for High-Current Operation and Low-Loss 100-V Double-Pulse Switching
Abstract
We report a large-periphery lattice-matched In₀.₁₆₄Al₀.₈₃₆N/GaN depletion-mode (D-mode) metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) on a SiC substrate for high-current power switching. The stress-free InAlN barrier is lattice-matched to GaN, enabling scaling to a total gate width of 45 mm. The device delivers a continuous drain current of 24.7 A (≈550 mA/mm) atVDS= 10 V with a threshold voltage of about -7.5 V, demonstrating strong high-current capability in D-mode operation. DC and temperature-dependent measurements confirm robust current drive and a clear saturation knee up to 450 K, highlighting the benefits of the lattice-matched barrier and the high thermal conductivity of the SiC substrate. Small-signal measurements show that the input and output capacitances (CissandCoss) remain in the range of several tens of picofarads with weakVDSdependence, while the reverse transfer capacitanceCrssis about 1.46 pF (≈5% ofCiss) at 100 V, indicating limited Miller coupling between gate and drain. Consistent with these capacitance characteristics, 100-V double-pulse tests at a drain current of 1 A yield low turn-on and turn-off energies of approximately 4.2 μJ and 2.8 μJ, respectively, together with well-damped switching waveforms and no pronounced current collapse. Correlating the capacitance distribution with the measured switching metrics, this work demonstrates that lattice-matched InAlN/GaN D-mode MIS-HEMTs on SiC are promising building blocks for high-efficiency power conversion and cascode-based integrated voltage regulator architectures.
Fields of Study & Subjects
GaN-based semiconductor devices and materials
Silicon Carbide Semiconductor Technologies
Ga2O3 and related materials
Publication details
- Journal / source
- IEEE Access
- Volume
- 14
- Pages
- 47106–47114
- Publication date
- 1 January 2026
- Language
- EN