Design in Tiles: Automating GEMM Deployment on Tile-Based Many-PE Accelerators

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Authors: Aofeng Shen, Chi Zhang, Yakup Budanaz, Alexandru Calotoiu, Bowen Wang, Torsten Hoefler, Luca Benini
Cited by: 0
References: 2

Abstract

Tile-based many-Processing Element (PE) accelerators can achieve competitive performance on General Matrix Multiplication (GEMM), but they are extremely hard to program, as their optimal software mapping is deeply coupled with hardware design which is unwieldy to manual deployment. We propose "Design in Tiles (DiT)", an automated framework connecting a deployment toolchain with a configurable executable model for these accelerators. For evaluation, we apply our framework to GEMM targeting a large acceleration configuration (e.g., 32x32 tiles, 1979 TFLOPS@FP8, 4 TB/s Bandwidth) comparable to an NVIDIA GH200. We achieve higher PE utilization than GH200 with its expert-tuned GEMM libraries, achieving 1.2-2.0x speedup across diverse matrix shapes.

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Interconnection Networks and Systems Network Packet Processing and Optimization

Publication details

Journal / source
2026 IEEE 37th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Publisher
IEEE
Pages
165–166
Publication date
1 September 2026