Benchmarking Continual Learning on Netlists with Circuit-Targeted Graph Neural Networks

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Authors: Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
Cited by: 0
References: 31

Abstract

The rapid evolution of integrated circuits demands that machine learning (ML) for electronic design automation (EDA) adapts to new circuit semantics without catastrophic forgetting (CF) of prior knowledge-a challenge unaddressed by commonly established, static training paradigms. Continual learning (CL) offers a promising approach, but its application to evolving netlists remains unexplored. Here, we present the first benchmarking study of CL on netlists with circuit-targeted graph neural networks (GNNs). We evaluate six CL methods, including parameter regularization, replay-based, and hybrid approaches, all for a fixed GNN architecture for fair comparison. Our benchmarking covers two foundational GNN applications commonly found in EDA: gate-level node classification and netlistlevel link prediction. We find that replay-based CL techniques are particularly suitable for hindering CF in such circuit-targeted GNN applications. This work paves the way for future adaptive EDA tools for emerging design landscapes. All benchmarking materials are released at [1].

Fields of Study & Subjects

VLSI and FPGA Design Techniques Domain Adaptation and Few-Shot Learning Physical Unclonable Functions (PUFs) and Hardware Security

Publication details

Journal / source
Asia and South Pacific Design Automation Conference (ASP-DAC)
Pages
15–21
Publication date
19 January 2026
Language
EN